Unverified60% confidenceFactExact time
Native FP8 hardware acceleration was first implemented in the fourth-generation Tensor Cores of the NVIDIA Hopper architecture (H100, 2022), with a peak throughput of 3958 TFLOPS.
2
Sources
60%
Confidence
Long-term
Relevance
7/22/2026
First Seen
Sources
Related Claims
UnverifiedNVIDIA began natively supporting FP8 computation starting with the Hopper architecture (H100).80% similarUnverifiedV100的Tensor Core在FP16精度下峰值算力可达125 TFLOPS，是前代Pascal架构的5倍以上77% similarVerifiedThe NVIDIA A100 has 6,912 CUDA cores and 432 Tensor Cores, with a theoretical peak compute of 312 TFLOPS (BF16).76% similarUnverifiedThe H100's fourth-generation Tensor Core natively supports FP8, with a peak compute of 3958 TFLOPS, which is twice that of FP16.74% similarUnverifiedNVFP4 requires a GPU with fifth-generation Tensor Core FP4 support to deliver hardware acceleration; older-generation GPUs can only emulate it via dequantization, and the speed gains are greatly diminished.74% similar
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