EDA

Exploratory Data Analysis (EDA) was proposed by statistician John Tukey in 1977.

EDA is a professional software toolchain in the field of circuit design, covering schematic drawing, PCB routing, and simulation verification; common tools include Altium Designer, KiCad, and Cadence.

The original motivation for Tcl was to provide an embeddable scripting language for EDA (Electronic Design Automation) tools.

The EDA software market is dominated by three major players: Synopsys, Cadence, and Siemens EDA.

A large amount of the core computation in CAE/EDA solvers (sparse matrix solving, FFT, particle/ray tracing) is already supported by mature CUDA libraries such as cuSOLVER, cuSPARSE and cuFFT.

The partnership focuses on faster simulation speed, open benchmarks and datasets for physical AI, and evaluation systems for agentic AI in the CAE/EDA domains.

Evaluation of agentic AI in CAE/EDA scenarios needs to measure the correctness of numerical results, compliance with software API calls, recovery ability after failures, and the auditability of the decision process.

In recent years EDA vendors have begun applying machine learning to individual steps such as placement optimization and parameter tuning, but the design subject is still human.

EDA tools from vendors such as Synopsys and Cadence have long dominated the market.

Traditional EDA tools have an extremely steep learning curve, and products like siliXon try to use natural language and agent collaboration to change the entry point from learning the tool to clearly stating requirements

Core EDA tools cover stages such as logic synthesis (RTL to gate-level netlist), placement and routing, timing analysis, and physical verification.

ML models are used for timing violation prediction and lithography hotspot detection, flagging high-risk areas early in the flow by learning patterns in historical design data; but these methods still rely on human-defined objective functions and constraints, and AI does not autonomously propose architectural solutions.

Under advanced processes, the EDA licensing cost for a single chip can reach tens of millions of dollars, and it is deeply bound to foundries' process design kits (PDKs), forming an extremely high barrier to entry.

EDA is the set of software tools that supports modern chip design, with major vendors including Synopsys, Cadence, and Mentor Graphics (now part of Siemens).

EDA tools include logic synthesis, place and route, timing analysis, formal verification, simulators, and more, and each type of tool has strict input formats and parameter semantics.

将EDA工具暴露给AI代理调用的前提是工具本身具备可编程接口（如Tcl脚本、Python API）且流程步骤有明确的输入输出定义。

The global EDA industry has long been dominated by three companies—Synopsys, Cadence, and Siemens EDA—which together hold more than approximately 70% of the global EDA market.

Synthesis is the automated conversion of RTL code into a gate-level netlist composed of standard cell libraries, completed by EDA tools.

Mainstream commercial EDA tools include products from Synopsys, Cadence, and Siemens EDA.

The EDA (Encoder-Decoder based Attractor) mechanism extends upon EEND and is capable of handling scenarios where the number of speakers changes dynamically.