CoWoS
An advanced chip packaging technology developed by TSMC that tightly integrates multiple chips on a single substrate, substantially reducing inter-chip communication distances to achieve higher bandwidth and lower power consumption. It is a key packaging solution for modern AI accelerators.
Timeline (last 90 days)
When demand for AI accelerator cards is high, foundry and packaging resources (such as CoWoS) are tilted toward higher-margin data center products, and the wafer starts for consumer flagship models are compressed accordingly.
Broadcom possesses key IP such as high-speed SerDes, switch chips, and advanced packaging (such as supporting CoWoS-type processes).
A chiplet refers to splitting what was originally a single large chip into multiple functional modules, each manufactured on the most suitable process, and then integrating them on the same substrate through advanced packaging.
NVIDIA H100/H200 relies on CoWoS to stack-package GPU dies together with HBM memory.
The compute bottleneck has shifted from chip production capacity to advanced packaging (CoWoS) and high-bandwidth memory (HBM).
CoWoS (Chip on Wafer on Substrate) is an advanced packaging technology developed by TSMC that achieves higher bandwidth and lower power consumption by integrating multiple chips on a single substrate.
Determining whether there is a bubble in AI requires a comprehensive assessment combining capital expenditure data from multiple cloud vendors, GPU utilization rates, paid conversion rates of AI applications, and the macroeconomic interest rate environment.
Between 2023 and 2024, the delivery lead time for NVIDIA H100s once reached 36–52 weeks; by the second half of 2025, GPU availability improved significantly as TSMC expanded its CoWoS advanced packaging capacity.
All Facts (8)
Between 2023 and 2024, the delivery lead time for NVIDIA H100s once reached 36–52 weeks; by the second half of 2025, GPU availability improved significantly as TSMC expanded its CoWoS advanced packaging capacity.
60%UnverifiedWhen demand for AI accelerator cards is high, foundry and packaging resources (such as CoWoS) are tilted toward higher-margin data center products, and the wafer starts for consumer flagship models are compressed accordingly.
50%UnverifiedBroadcom possesses key IP such as high-speed SerDes, switch chips, and advanced packaging (such as supporting CoWoS-type processes).
50%UnverifiedA chiplet refers to splitting what was originally a single large chip into multiple functional modules, each manufactured on the most suitable process, and then integrating them on the same substrate through advanced packaging.
50%UnverifiedThe compute bottleneck has shifted from chip production capacity to advanced packaging (CoWoS) and high-bandwidth memory (HBM).
50%UnverifiedCoWoS (Chip on Wafer on Substrate) is an advanced packaging technology developed by TSMC that achieves higher bandwidth and lower power consumption by integrating multiple chips on a single substrate.
50%UnverifiedNVIDIA H100/H200 relies on CoWoS to stack-package GPU dies together with HBM memory.
50%UnverifiedDetermining whether there is a bubble in AI requires a comprehensive assessment combining capital expenditure data from multiple cloud vendors, GPU utilization rates, paid conversion rates of AI applications, and the macroeconomic interest rate environment.
50%