RP2350
A dual-core Cortex-M33 microcontroller released by the Raspberry Pi Foundation, clocked at 150 MHz with 520 KB of on-chip SRAM, intended for embedded applications.
Timeline (last 90 days)
Phone SoCs typically have several GB of memory and tens of TOPS of NPU computing power, three to four orders of magnitude apart from microcontrollers such as the RP2350.
The Pico 2 W is equipped with the RP2350 microcontroller.
The RP2350 is a dual-core Cortex-M33 microcontroller released by the Raspberry Pi Foundation in 2024, with a clock frequency of 150 MHz, 520 KB of built-in SRAM, and optional 2 MB or 4 MB of on-chip flash.
The Pico 2 W board carries 4 MB of on-chip flash.
A developer implemented a complete image generation model on the RP2350 microcontroller capable of generating face images at 128×128 resolution.
The RP2350 is the second-generation microcontroller chip launched by the Raspberry Pi Foundation in 2024, featuring a dual-core ARM Cortex-M33 processor running at 150 MHz and equipped with 520 KB of on-chip SRAM.
The inference engine uses a DMA streaming load strategy that prefetches the weights of the next layer from Flash storage via DMA while computing the current layer, in order to hide slow Flash read latency.
The model completes a full inference pass on the RP2350 in approximately 20 seconds at most, and the results can be displayed on a monitor or transferred via USB.
All Facts (8)
The RP2350 is the second-generation microcontroller chip launched by the Raspberry Pi Foundation in 2024, featuring a dual-core ARM Cortex-M33 processor running at 150 MHz and equipped with 520 KB of on-chip SRAM.
70%UnverifiedPhone SoCs typically have several GB of memory and tens of TOPS of NPU computing power, three to four orders of magnitude apart from microcontrollers such as the RP2350.
50%UnverifiedThe Pico 2 W is equipped with the RP2350 microcontroller.
50%UnverifiedThe RP2350 is a dual-core Cortex-M33 microcontroller released by the Raspberry Pi Foundation in 2024, with a clock frequency of 150 MHz, 520 KB of built-in SRAM, and optional 2 MB or 4 MB of on-chip flash.
50%UnverifiedThe Pico 2 W board carries 4 MB of on-chip flash.
50%UnverifiedThe inference engine uses a DMA streaming load strategy that prefetches the weights of the next layer from Flash storage via DMA while computing the current layer, in order to hide slow Flash read latency.
50%UnverifiedThe model completes a full inference pass on the RP2350 in approximately 20 seconds at most, and the results can be displayed on a monitor or transferred via USB.
50%UnverifiedA developer implemented a complete image generation model on the RP2350 microcontroller capable of generating face images at 128×128 resolution.
50%